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1. general description the tda8953 is a stereo or mono high-efficiency class d audio power amplifier in a single ic featuring low power dissipatio n. it is designed to deliver up to 2 210 w into a 4 load in a stereo single-ended (se) application, or 1 420 w into an 8 load in a mono bridge-tied load (btl) application. it combines the benefits of class d efficiency ( 93 % into a 4 load) with audiophile sound quality comparable to that associated with class ab amplification. the amplifier operates over a wide supply voltage range from 12.5 v to 42.5 v and features low quiescent current consumption. 2. features ? high output power in typical applications: ? se 2 210 w, r l = 4 (v dd = 41 v; v ss = ? 41 v) ? se 2 235 w, r l = 3 (v dd = 39 v; v ss = ? 39 v) ? se 2 150 w, r l = 6 (v dd = 41 v; v ss = ? 41 v) ? btl 1 420 w, r l = 8 (v dd = 41 v; v ss = ? 41 v) ? symmetrical operating supply voltage range from 12.5 v to 42.5 v ? stereo full differential inputs, can be used as stereo se or mono btl amplifier ? low noise ? smooth pop noise-free start-up and switch off ? fixed frequency internal or external clock ? high efficiency 93 % ? zero dead time switching ? low quiescent current ? advanced protection strategy: voltage pr otection and output current limiting ? thermal foldback (tfb) with disable functionality ? fixed gain of 30 db in se and 36 db in btl applications ? fully short-circuit proof across load ? bd modulation in btl configuration ? clock protection tda8953 2 210 w class-d power amplifier rev. 01 ? 24 december 2009 product data sheet
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 2 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 3. applications 4. quick reference data [1] v dd is the supply voltage on pins vddp1, vddp2 and vdda. [2] v ss is the supply voltage on pins vssp1, vssp2 and vssa. [3] output power is measured indirectly; based on r dson measurement; see section 14.3 . 5. ordering information ? dvd ? home theater in a box (htiab) system ? mini and micro receiver ? high-power speaker system ? subwoofers ? public address (pa) system table 1. quick reference data symbol parameter conditions min typ max unit general v dd positive supply voltage operating mode [1] 12.5 41 42.5 v v ss negative supply voltage operating mode [2] ? 12.5 ? 41 ? 42.5 v v th(ovp) overvoltage protection threshold voltage standby, mute modes; v dd ? v ss 85 - 90 v i dd(tot) total positive supply current the sum of the currents through pins vdda, vddp1 and vddp2 operating mode; no load; no filter; no rc-snubber network connected; - 50 60 ma i ss(tot) total negative supply current the sum of the currents through pins vssa, vssp1 and vssp2 operating mode; no load; no filter; no rc-snubber network connected; - 65 75 ma stereo single-ended configuration p o output power t j = 85 c; l lc = 15 h; c lc = 680 nf (see figure 13 ) thd + n = 10 %; r l = 4 ; v dd = 41 v; v ss = ? 41 v [3] - 210 - w thd + n = 10 %; r l = 4 ; v dd = 35 v; v ss = ? 35 v - 150 - w mono bridge-tied load configuration p o output power t j = 85 c; l lc = 22 h; c lc = 680 nf (see figure 13 ); r l = 8 ; thd + n = 10 %; v dd = 41 v; v ss = ? 41 v [3] - 420 - w table 2. ordering information type number package name description version tda8953 j dbs23p plastic dil-bent-sil power package; 23 leads (straight lead length 3.2 mm) sot411-1 tda8953 th hsop24 plastic, heatsink small outline package; 24 leads; low stand-off height sot566-3
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 3 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 6. block diagram pin numbers in brackets refer to type number tda8953 j. fig 1. block diagram 010aaa61 6 out1 v ssp1 v ddp2 driver high out2 boot2 tda8953th (tda8953j) boot1 driver low switch1 control and handshake pwm modulator manager oscillator temperature sensor current protection voltage protection stabi mode input stage mute 9 (3) 8 (2) in1m in1p 22 (15) 21 (14) 20 (13) 17 (11) 16 (10) 15 (9) vssp2 vssp1 driver high driver low switch2 control and handshake pwm modulator 11 (5) oscref 7 (1) osc 2 (19) sgnd 6 (23) mode input stage mute 5 (22) 4 (21) in2m in2p 19 (17) 24 (-) vssa n.c. 1 (18) vssa 12 (6) n.c. 3 (20) vdda 10 (4) n.c. 23 (16) 13 (7) 18 (12) 14 (8) vddp2 prot stabi vddp1
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 4 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 7. pinning information 7.1 pinning fig 2. pin configuration tda8953 th fig 3. pin configuration tda8953 j tda8953th vssa vssa vddp2 sgnd boot2 vdda out2 in2m vssp2 in2p n.c. mode stabi osc vssp1 in1p out1 in1m boot1 n.c. vddp1 oscref prot n.c. 010aaa617 24 23 22 21 20 19 18 17 16 15 14 13 11 12 9 10 7 8 5 6 3 4 1 2 tda8953j osc in1p in1m n.c. oscref n.c. prot vddp1 boot1 out1 vssp1 stabi vssp2 out2 boot2 vddp2 n.c. vssa sgnd vdda in2m in2p mode 010aaa61 8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 5 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 7.2 pin description 8. functional description 8.1 general the tda8953 is a two-channel audio power amplifier that uses class d technology. for each channel, the audio input signal is co nverted into a digital pulse width modulation (pwm) signal using an analog input stage and a pwm modulator; see figure 1 . to drive the output power transistors, the digital pwm signal is fed to a control and handshake block and to high- and low-side driver circuits . this level-shifts th e low-power digital pwm signal from a logic level to a high-power pwm signal switching between the main supply lines. a second-order low-pass filter converts the pwm signal to an analog audio signal that can be used to drive a loudspeaker. table 3. pin description symbol pin description tda8953 th tda8953 j vssa 1 18 negative analog supply voltage sgnd 2 19 signal ground vdda 3 20 positive analog supply voltage in2m 4 21 channel 2 negative audio input in2p 5 22 channel 2 positive audio input mode 6 23 mode selection input: standby, mute or operating mode osc 7 1 oscillator frequency adjustment or tracking input in1p 8 2 channel 1 positive audio input in1m 9 3 channel 1 negative audio input n.c. 10 4 not connected oscref 11 5 reference for osc pin n.c. 12 6 not connected prot 13 7 decoupling capacitor for protection (ocp) vddp1 14 8 channel 1 positive power supply voltage boot1 15 9 channel 1 bootstrap capacitor out1 16 10 channel 1 pwm output vssp1 17 11 channel 1 negative power supply voltage stabi 18 12 decoupling of internal stabilizer for logic supply n.c. 19 17 not connected vssp2 20 13 channel 2 negative power supply voltage out2 21 14 channel 2 pwm output boot2 22 15 channel 2 bootstrap capacitor vddp2 23 16 channel 2 positive power supply voltage vssa 24 - negative analog supply voltage
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 6 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier the tda8953 single-chip class d amplifier cont ains high-power switches, drivers, timing and handshaking between the power switches, along with some control logic. to ensure maximum system robustness, an advanced prot ection strategy has been implemented to provide overvoltage, overtemperat ure and overcurrent protection. each of the two audio channels contains a pwm modulator, an analog feedback loop and a differential input stage. the tda8953 also contains circuits common to both channels such as the oscillator, all re ference sources, the mode in terface and a digital timing manager. the two independent amplifier channels feature high output power, high efficiency, low distortion and low quiescent currents. they can be connected in the following configurations: ? stereo single-ended (se) ? mono bridge-tied load (btl) the amplifier system can be sw itched to one of three operating modes using pin mode: ? standby mode: featuring very low quiescent current ? mute mode: the amplifier is operational but the audio signal at the output is suppressed by disabling the voltage-to-current (vi) converter input stages ? operating mode: the amplifier is fully operational, de-muted and can deliver an output signal a slowly rising voltage should be applied (e.g. via an rc network) to pin mode to ensure pop noise-free start-up. the bias-current sett ing of the (vi converter) input stages is related to the voltage on the mode pin. in mute mode, the bias-current setting of th e vi converters is zero (vi converters are disabled). in operating mode, the bias curr ent is at a maximum. the time constant required to apply the dc output offset voltage gradually between mute and operating mode levels can be generated using an rc network connected to pin mode. an example of a circuit for driving the mode pin, opti mized for optimal pop noise performance, is shown in figure 4 . if the capacitor was omitted, the very short switching time constant could result in audible pop noises being generated at start-up (depending on the dc output offset voltage and loudspeaker used). fig 4. example of mode selection circuit 010aaa62 3 sgnd mode mute/ operating 10 f 5.6 k +5 v 470 standby/ operating s2 s1 5.6 k tda8953
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 7 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier the smooth transition between mute and operating modes causes a gradual increase in the dc offset output voltage, which become s inaudible (no pop noise because the dc offset voltage rises smoothly). an overview of the start-up timing is provided in figure 5 . for proper switch-off, the mode pin should be forced low at least 100 ms before the supply lines (v dd and v ss ) drop below 12.5 v. (1) first 1 ? 4 pulse down. upper diagram: when switching from standby to mute, t here is a delay of approximately 100 ms before the output starts switching. the audio signal will become available once v mode reaches the operating mode level (see table 9 ), but not earlier than 150 ms after switching to mute. to start-up pop noise-free, it is recommended that the time cons tant applied to pin mode be at least 350 ms for the transition between mute and operating modes. lower diagram: when switching directly from standby to operating mode, there is a delay of 100 ms before the outputs start switching. the a udio signal becomes available after a second delay of 50 ms. to start-up pop noise-free, it is recommended that the time-constant applied to pin mode be at least 500 ms for the transition between standby and operating modes. fig 5. timing on mode selection input pin mode 2.2 v < v mode < 3 v audio output operating standby mute 50 % duty cycle > 4.2 v 0 v (sgnd) time 001aah65 7 v mode 100 ms 50 ms modulated pwm > 350 ms 2.2 v < v mode < 3 v audio output operating standby mute 50 % duty cycle > 4.2 v 0 v (sgnd) time v mode 100 ms 50 ms modulated pwm > 350 ms (1) (1)
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 8 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 8.2 pulse-width modul ation frequency the amplifier output signal is a pwm signal with a typical carrier frequency of between 250 khz and 450 khz. a second-order lc demodulation filter on the output converts the pwm signal into an analog audio signal. the carrier frequency, f osc , is determined by an external resistor, r osc , connected between pins osc and oscref. the optimal carrier frequency setting is between 250 khz and 450 khz. the carrier frequency is set to 335 khz by connecting an external 30 k resistor between pins osc and oscref (see figure 6 ). if two or more class d amplifiers are used in the same audio application, an external clock circuit must be used to synchronize all amplifiers (see section 14.4 ). this will ensure that they operate at the same switching frequency, thus avoiding beat tones (if the switching frequencies are different, audible interference known as ?beat tones? can be generated). 8.3 protection the following protection circuits are incorporated into the tda8953: ? thermal protection: ? thermal foldback (tfb) ? overtemperature protection (otp) ? overcurrent protection (ocp) ? window protection (wp) ? supply voltage protection: ? undervoltage protection (uvp) ? overvoltage protection (ovp) ? unbalance protection (ubp) ? clock protection (cp) fig 6. carrier frequency as a function of r osc r osc (k ) 20 45 40 30 35 25 010aaa596 300 400 500 f osc (khz) 200
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 9 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier how the device reacts to a fault condition depends on which protection circuit has been activated. 8.3.1 thermal protection the tda8953 employes an advanced ther mal protection strategy. a tfb function gradually reduces the output power within a defined temperature range. if the temperature continues to rise, otp is activated to shut the device down completely. 8.3.1.1 thermal foldback (tfb) if the junction temperature (t j ) exceeds the thermal fold back activation threshold (t act(th_fold) ), the gain is gradually reduced. this reduces the output signal amplitude and the power dissipation, eventually stabiliz ing the temperature. thermal foldback is activated if the temperature rises to t act(th_fold) (see figure 7 ). thermal foldback is active when: t act(th_fold) < t j < t act(th_prot) the value of t act(th_fold) for the tda8953 is approximately 145 c; see ta b l e 9 for more details. the gain will be reduced by at least 6 db (to t hg(th_fold) ) before the temperature reaches t act(th_prot) (see figure 8 ). tfb can be disabled by applying the appropriate voltage on pin mode (see table 9 ), in which case the dissipation will not be limited by tfb. the junction temperature may then rise as high as the otp threshold, wh en the amplifier will be shut down (see section 8.3.1.2 ). the amplifier will start up again once it has cooled down . this introduces audio holes. 8.3.1.2 overtemperature protection (otp) if tfb fails to stabilize the temperature and the junction temperature co ntinues to rise, the amplifier will shut down as soon as the temperature re aches the thermal protection activation threshold, t act(th_prot) . the amplifier will resume switching approximately 100 ms after the temperature drops below t act(th_prot) . the thermal behavior is illustrated in figure 8 . fig 7. tfb 010aaa619 v load t t act(th_fold) thermal foldback activated t
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 10 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 8.3.2 overcurrent protection (ocp) in order to guarantee the robustness of t he tda8953, the maximum output current delivered at the output stages is limited. oc p is built in for each output power switch. ocp is activated when the current in one of the power transistors exceeds the ocp threshold (i orm = 12 a) due, for example, to a short- circuit to a supply line or across the load. the tda8953 amplifier distinguishes betwe en low-ohmic short-circuit conditions and other overcurrent conditions such as a dynamic impedance drop at the loudspeaker. the impedance threshold (z th ) depends on the supply voltage. how the amplifier reacts to a short circuit depends on the short-circuit impedance: ? short-circuit impedance > z th : the amplifier lim its the maximum output current to i orm but the amplifier does not shut down the pwm outputs. effectively, this results in a clipped output signal across the load (be havior very similar to voltage clipping). ? short-circuit impedance < z th : the amplifier lim its the maximum output current to i orm and at the same time discharges the capacitor on pin prot. when c prot is fully discharged, the amplifier shuts down completely and an internal timer is started. the value of the protection capacitor (c prot ) connected to pin prot can be between 10 pf and 220 pf (typically 47 pf). while ocp is activated, an internal current source is enabled that will discharge c prot . when ocp is activated, the active power transistor is turned off and the other power transistor is turned on to reduce the current (c prot is partially discharged). normal operation is resumed at the next switching cycle (c prot is recharged). c prot is partially discharge each time ocp is activated during a s witching cycle. if the fault condition that caused ocp to be activated persists long enough to fully discharge c prot , the amplifier will switch off completely and a restart sequence will be initiated. (1) duty cycle of pwm output modulat ed according to the audio input signal. (2) duty cycle of pwm output reduced due to tfb. (3) amplifier is switched off due to otp. fig 8. behavior of tfb and otp 30 24 0 1 2 3 t gain [db] 010aaa62 0 t act(th_fold) t hg(th_fold) t act(th_prot)
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 11 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier after a fixed period of 100 ms, the amplifier will attempt to sw itch on again, but will fail if the output current still exceeds the ocp threshold. the amp lifier will continue trying to switch on every 100 ms. the average power dissipation will be low in this situation because the duty cycle is short. switching the amplifier on and off in this wa y will generate unwanted ?audio holes?. this can be avoided by increasing the value of c prot (up to 220 pf) to delay amplifier switch-off. c prot will also prevent the amplifier switching off due to transient frequency-dependent impedance drops at the speakers. the amplifier will switch on, and remain in operating mode, on ce the overcurrent condition has been removed. ocp ensures the tda8953 amplifier is fully protected against short-circuit conditions while avoiding audio holes. [1] ovp can be triggered by supply pumping; see section 14.6 . when a short circuit occurs between the lo ad and the supply voltage, the current will increase rapidly to i orm , when current limiting will be acti vated. if the short circuit condition persists long enough, the ocp circuit will shut down the amplifier. after the short circuit has been remov ed, the amplifier will resu me normal operations (see figure 9 ). 8.3.3 window protection (wp) window protection (wp) checks the conditions at the output terminals of the power stage and is activated: ? during the start-up sequence, when the tda8953 is switching from standby to mute. table 4. current limiting behavior during low output impedance conditions at different values of c prot type v dd /v ss (v) v i (mv, p-p) f (hz) c prot (pf) pwm output stops short (z th = 0 ) short (z th = 0.5 ) short (z th = 1 ) tda8953 +41/ ? 41 500 20 10 yes [1] yes [1] yes [1] 1000 10 yes no no 20 15 yes [1] yes [1] yes [1] 1000 15 yes no no 1000 220 no no no fig 9. current limiting i max i out current limiting short circuit protection short to vddp applied t switch off amplifier 010aaa62 1
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 12 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier start-up will be interrupted if a short-circ uit is detected between one of the output terminals and one of the supply pins. the tda8953 will wait until the short-circuit to the supply lines has been re moved before resumi ng start-up. the sh ort circuit will not generate large currents because the short-circuit check is carried out before the power stages are enabled. ? when the amplifier is shut down completely because the ocp circuit has detected a short circuit to one of the supply lines. wp will be activated when the amplifier at tempts to restart after 100 ms (see section 8.3.2 ). the amplifier will not start-up again until the short circ uit to the supply lines has been removed. 8.3.4 supply voltage protection if the supply voltage drops below the minimum supply voltage threshold, v th(uvp) , the uvp circuit will be activated and the system will sh ut down. once the su pply voltage rises above v th(uvp) again, the system will restart after a delay of 100 ms. if the supply voltage exceeds the maximum supply voltage threshold, v th(ovp) , the ovp circuit will be activated and th e power stages will be shut down . when the supply voltage drops below v th(ovp) again, the system will restart after a delay of 100 ms. an additional unbalance protection (ubp) ci rcuit compares the positive analog supply voltage (on pin vdda) with th e negative analog supply vo ltage (on pin vssa) and is triggered if the voltage difference exceeds a factor of two (v dda > 2 | v ssa | or | v ssa | > 2 v dda ). when the supply voltage difference drops below the unbalance threshold, v th(ubp) , the system restarts after 100 ms. 8.3.5 clock protection (cp) the clock signal can be prov ided by an external oscillato r connected to pin osc (see section 14.4 ). when this signal is lost, or the cl ock frequency is too low, the amplifier will be switched off and will remain off unt il the clock signal has been restored.
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 13 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 8.3.6 overview of protection functions an overview of all protection circuits and thei r respective effects on the output signal is provided in ta b l e 5 . [1] amplifier gain depends on the junction temperature. [2] the amplifier shuts down completely only if the s hort-circuit impedance is below the impedance threshold (z th ; see section 8.3.2 ). in all other cases, current limiting results in a clipped output signal. [3] fault condition detected during any standby-to-mute transition or during a restart after ocp has been activated (short-circuit to one of the supply lines). [4] as soon as the clock is present. 8.4 differential audio inputs the audio inputs are fully differential ensuring a high common mode rejection ratio and maximum flexibility in the application. ? stereo operation: to avoid supply pumping effects and to minimize peak currents in the power supply, the output stages should be configured in anti-phase. to avoid acoustical phase differences, the speakers should also be connected in anti-phase. ? mono btl operation: the inputs must be c onnected in anti-parallel. the output of one channel is inverted and the speaker load is connected between the two outputs of the tda8953. in practice (because of the ocp threshold) the maximum output power in the btl configuration can be boosted to twic e the maximum output power available in the single-ended configuration. the input configuration for a mono btl application is illustrated in figure 10 . table 5. overview of tda8953 protection circuits protection name complete shutdown restart directly restart after 100 ms prot pin active tfb [1] n n n n otp y n y n ocp y [2] n [2] y [2] y wp n [3] y n n uvp y n y n ovp y n y n ubp y n y n cp y n y [4] n
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 14 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier fig 10. input configuration for mono btl application v in in1p out1 power stage mbl466 out2 sgnd in1m in2p in2m
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 15 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 9. internal circuitry table 6. internal circuitry pin symbol equivalent circuit [1] tda8953th tda8953j 7 1 osc 11 5 oscref 13 7 prot 4 21 in2m 5 22 in2p 8 2 in1p 9 3 in1m 7 (1) open: external clock closed: internal clock 150 a 010aaa58 9 v dd v ss v ss 11 (5) 2 010aaa59 0 13 (7) 010aaa59 2 v ss current limiting 50 a ocp 1.5 ma 28 a 2 k 2 k 50 k 50 k sgnd sgnd 5, 8 (22, 2) 4, 9 (21, 3) 010aaa593
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 16 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier [1] pin numbers in brackets are for the tda8953 j 6 23 mode 1 18 vssa 2 19 sgnd 3 20 vdda 14 8 vddp1 15 9 boot1 16 10 out1 17 11 vssp1 18 12 stabi 20 13 vssp2 21 14 out2 22 15 boot2 23 16 vddp2 table 6. internal circuitry ?continued pin symbol equivalent circuit [1] tda8953th tda8953j 010aaa594 standby gain (mute tfb on 50 k 6 (23) sgnd v ss on) 010aaa59 5 10 v 17, 20 (11, 13) 1 (18) 18 (12) 16, 21 (10, 14) 2 (19) 3 (20) 15, 22 (9, 15) 14, 23 (8, 16)
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 17 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 10. limiting values 11. thermal characteristics table 7. limiting values in accordance with the absolute ma ximum rating system (iec 60134). symbol parameter conditions min max unit v voltage difference v dd ? v ss ; standby, mute modes - 90 v i orm repetitive peak output current maximum output current limiting; one channel driven 12 - a t stg storage temperature ? 55 +150 c t amb ambient temperature ? 40 +85 c t j junction temperature - 150 c v osc voltage on pin osc relative to v ssa 0 sgnd + 6 v v i input voltage referenced to sgnd; on pins in1p, in1m, in2p and in2m ? 5 +5 v v prot voltage on pin prot referenced to voltage on pin vssa 0 12 v v mode voltage on pin mode referenced to sgnd 0 8 v v esd electrostatic discharge voltage human body model (hbm) ? 2000 +2000 v charged device model (cdm) ? 500 +500 v v pwm(p-p) peak-to-peak pwm voltage on pins out1 and out2 - 120 v table 8. thermal characteristics symbol parameter conditions typ unit r th(j-a) thermal resistance from junction to ambient in free air 40 k/w r th(j-c) thermal resistance from junction to case 0.9 k/w
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 18 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 12. static characteristics table 9. static characteristics v dd = 41 v; v ss = ? 41 v; f osc = 335 khz; t amb = 25 c; unless otherwise specified. symbol parameter conditions min typ max unit supply v dd positive supply voltage operating mode [1] 12.5 41 42.5 v v ss negative supply voltage operating mode [2] ? 12.5 ? 41 ? 42.5 v v th(ovp) overvoltage protection threshold voltage standby, mute modes; v dd ? v ss 85 - 90 v v th(uvp) undervoltage protection threshold voltage v dd ? v ss 20 - 25 v v th(ubp) unbalance protection threshold voltage [3] - 33 - % i dd(tot) total positive supply current the sum of the currents through pins vdda, vddp1 and vddp2 operating mode; no lo ad; no filter; no rc-snubber network connected; - 50 60 ma i ss(tot) total negative supply current the sum of the currents through pins vssa, vssp1 and vssp2 operating mode; no lo ad; no filter; no rc-snubber network connected; - 65 75 ma i stb standby current - 490 650 a mode select input; pin mode v mode voltage on pin mode referenced to sgnd [4] 0 - 8 v standby mode [4] [5] 0 - 0.8 v mute mode [4] [5] 2.2 - 3.0 v operating mode [4] [5] 4.2 - 5.5 v operating mode without tfb [4] [5] 6.6 - 8 i i input current v i = 5.5 v - 110 150 a audio inputs; pins in1m, in1p, in2p and in2m v i input voltage dc input [4] - 0 - v amplifier outputs; pins out1 and out2 v o(offset) output offset voltage se; mute mode ? 37 - +37 mv se; operating mode [6] ? 150 - +150 mv btl; mute mode ? 30 - +30 mv btl; operating mode [6] ? 210 - +210 mv stabilizer output; pin stabi v o(stabi) output voltage on pin stabi mute and operating modes; with respect to vssa 9.5 10 10.5 v
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 19 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier [1] v dd is the supply voltage on pins vddp1, vddp2 and vdda. [2] v ss is the supply voltage on pins vssp1, vssp2 and vssa. [3] unbalance protection activated when v dda > 2 | v ssa | or | v ssa | > 2 v dda . [4] with respect to sgnd (0 v). [5] the transition between standby and mute modes has hysteresis , while the slope of the transition between mute and operating m odes is determined by the time-constant of the rc network on pin mode; see figure 11 . [6] dc output offset voltage is gradually applied to the output during the transition between mute and operating modes. the slop e caused by any dc output offset is determined by the time-constant of the rc network on pin mode. temperature protection t act(th_fold) thermal foldback activation temperature v mode < 5.5 v - 145 - c t hg(th_fold) thermal foldback half gain temperature v mode < 5.5 v; gain = 24 db - 153 - c t act(th_prot) thermal protection activation temperature - 154 - c table 9. static characteristics ?continued v dd = 41 v; v ss = ? 41 v; f osc = 335 khz; t amb = 25 c; unless otherwise specified. symbol parameter conditions min typ max unit fig 11. behavior of mode selection pin mode 010aaa56 4 0 0.8 v o [v] v mode [v] v o(offset)(on) v o(offset)(mute) 2.2 4.2 5.5 6.6 8 3.0 slope is directly related to the time constant of the rc network on the mode pin on on no tfb mute standby
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 20 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 13. dynamic characteristics 13.1 switching characteristics [1] when using an external oscillator, the frequency f track (500 khz minimum, 1000 khz maximum) will result in a pwm frequency f osc (250 khz minimum, 500 khz maximum) due to the internal clock divider; see section 8.2 . [2] when t r(i) > 100 ns, the output noise floor will increase. table 10. dynamic characteristics v dd = 41 v; v ss = ? 41 v; t amb = 25 c; unless otherwise specified. symbol parameter conditions min typ max unit internal oscillator f osc(typ) typical oscillator frequency r osc = 30.0 k 290 335 365 khz f osc oscillator frequency 250 - 450 khz external oscillator input or frequency tracking; pin osc v osc voltage on pin osc high-level sgnd + 4.5 sgnd + 5 sgnd + 6 v v trip trip voltage - sgnd + 2.5 - v f track tracking frequency [1] 500 - 1000 khz z i input impedance 1 - - m c i input capacitance - - 15 pf t r(i) input rise time from sgnd + 0 v to sgnd + 5 v [2] - - 100 ns
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 21 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 13.2 stereo se configur ation characteristics [1] r sl is the series resistance of the low-pass lc filter inductor used in the application. [2] output power is measured indirectly; based on r dson measurement; see section 14.3 . [3] one channel driven at maximum output power; the ot her channel driven at one eight maximum output power. [4] thd measured between 22 hz and 20 khz, using aes17 20 khz brick wall filter. [5] v ripple = v ripple(max) = 2 v (p-p); measured independently between vddpn and sgnd and between vsspn and sgnd. [6] 22 hz to 20 khz, using aes17 20 khz brick wall filter. [7] 22 hz to 20 khz, using aes17 20 khz brick wall filter. [8] p o = 1 w; f i = 1 khz. [9] v i = v i(max) = 1 v (rms); f i = 1 khz. [10] leads and bond wires included. table 11. dynamic characteristics v dd = 41 v; v ss = ? 41 v; r l = 4 ; f i = 1 khz; f osc = 335 khz; r sl < 0.1 [1] ; t amb = 25 c; unless otherwise specified. symbol parameter conditions min typ max unit p o output power l = 15 h; c lc = 680 nf; t j = 85 c [2] thd = 0.5 %; r l = 4 - 160 - w thd = 10 %; r l = 4 - 210 - w thd = 10 %; r l = 3 ; v p = 39 v [3] - 235 - w thd total harmonic distortion p o = 1 w; f i = 1 khz [4] - 0.03 0.1 % p o = 1 w; f i = 6 khz [4] - 0.05 - % g v(cl) closed-loop voltage gain 29 30 31 db svrr supply voltage rejection ratio between pins vddpn and sgnd operating mode; f i = 100 hz [5] - 90 - db operating mode; f i = 1 khz [5] - 70 - db mute mode; f i = 100 hz [5] - 75 - db standby mode; f i = 100 hz [5] - 120 - db between pins vsspn and sgnd operating mode; f i = 100 hz [5] - 80 - db operating mode; f i = 1 khz [5] - 60 - db mute mode; f i = 100 hz [5] - 80 - db standby mode; f i = 100 hz [5] - 115 - db z i input impedance between an input pin and sgnd 45 56 - k v n(o) output noise voltage operating mode; inputs shorted [6] - 160 - v mute mode [7] - 85 - v cs channel separation [8] - 70 - db | g v | voltage gain difference - - 1 db mute mute attenuation f i = 1 khz; v i = 2 v (rms) [9] - 75 - db cmrr common mode rejection ratio v i(cm) = 1 v (rms) - 75 - db po output power efficiency se, r l = 4 - 93 - % se, r l = 3 - 90 - % btl, r l = 8 - 93 - % r dson(hs) high-side drain-source on-state resistance [10] - 110 - m r dson(ls) low-side drain-source on-state resistance [10] - 105 - m
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 22 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 13.3 mono btl application characteristics [1] r sl is the series resistance of the low-pass lc filter inductor used in the application. [2] output power is measured indirectly; based on r dson measurement; see section 14.3 . [3] thd measured between 22 hz and 20 khz, using aes17 20 khz brick wall filter. [4] v ripple = v ripple(max) = 2 v (p-p). [5] 22 hz to 20 khz, using an aes17 20 khz bric k wall filter; low noise due to bd modulation. [6] 22 hz to 20 khz, using an aes17 20 khz brick wall filter. [7] v i = v i(max) = 1 v (rms); f i = 1 khz. table 12. dynamic characteristics v dd = 41 v; v ss = ? 41 v; r l = 8 ; f i = 1 khz; f osc = 335 khz; r sl < 0.1 [1] ; t amb = 25 c; unless otherwise specified. symbol parameter conditions min typ max unit p o output power t j = 85 c; l lc = 15 h; c lc = 680 nf (see figure 13 ) [2] thd = 0.5 %; r l = 8 - 330 - w thd = 10 %; r l = 8 - 420 - w thd total harmonic distortion p o = 1 w; f i = 1 khz [3] - 0.03 0.1 % p o = 1 w; f i = 6 khz [3] - 0.05 - % g v(cl) closed-loop voltage gain - 36 - db svrr supply voltage rejection ratio between pin vddpn and sgnd operating mode; f i = 100 hz [5] - 80 - db operating mode; f i = 1 khz [5] - 80 - db mute mode; f i = 100 hz [5] - 95 - db standby mode; f i = 100 hz [5] - 120 - db between pin vsspn and sgnd operating mode; f i = 100 hz [5] - 75 - db operating mode; f i = 1 khz [5] - 75 - db mute mode; f i = 100 hz [5] - 90 - db standby mode; f i = 100 hz [5] - 130 - db z i input impedance measured between one of the input pins and sgnd 45 56 - k v n(o) output noise voltage operating mode; inputs shorted [5] - 190 - v mute mode [6] - 45 - v mute mute attenuation f i = 1 khz; v i = 2 v (rms) [7] - 75 - db cmrr common mode rejection ratio v i(cm) = 1 v (rms) - 75 - db
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 23 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 14. application information 14.1 mono btl application when using the power amplifier in a mono bt l application, the inputs of the two channels must be connected in anti-parallel and the phase of one of the inputs must be inverted; see figure 10 . in principle, the loudspeaker can be connected between the outputs of the two single-ended demodulation filters. 14.2 pin mode to ensure a pop noise-free start-up, an rc time-constant must be applied to pin mode. the bias-current setting of the vi converter inpu t is directly related to the voltage on pin mode. in turn the bias-current setting of the vi converters is direct ly related to the dc output offset voltage. a slow dv/dt on pin mode results in a slow dv/dt for the dc output offset voltage, ensuring a pop noise-free tr ansition between mute and operating modes. a time-constant of 500 ms is sufficient to guarantee pop noise-free start-up; see figure 4 , figure 5 and figure 11 for more information. 14.3 estimating the output power 14.3.1 single-ended (se) maximum output power: (1) maximum output current is internally limited to 12 a: (2) where: ? p o(0.5 %) : output power at the onset of clipping ? r l : load impedance ? r dson(hs) : high-side r dson of power stage output dmos (temperature dependent) ? r s(l) : series impedance of the filter coil ? t w(min) : minimum pulse width (typical 150 ns; temperature dependent) ? f osc : oscillator frequency remark: note that i o(peak) should be less than 12 a ( section 8.3.2 ). i o(peak) is the sum of the current through the load and the ripple current. the value of the ripple current is dependent on the coil inductance and the voltage drop across the coil. p o0.5 % () r l r l r dson hs () r sl () ++ -------------------------------------------------------- 0.5 v dd v ss ? () 1t wmin () 0.5 f osc ? () 2 2r l ------------------------------------------------------------------------------------------------------------------------------- ------------------------------------------- = i opeak () 0.5 v dd v ss ? () 1t wmin () 0.5f osc ? () r l r dson hs () r sl () ++ --------------------------------------------------------------------------------------------------- =
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 24 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 14.3.2 bridge-tied load (btl) maximum output power: (3) maximum output current in ternally limited to 12 a: (4) where: ? p o(0.5 %) : output power at the onset of clipping ? r l : load impedance ? r dson(hs) : high-side r dson of power stage output dmos (temperature dependent) ? r dson(ls) : low-side r dson of power stage output dmos (temperature dependent) ? r s(l) : series impedance of the filter coil ? t w(min) : minimum pulse width (typical 150 ns, temperature dependent) ? f osc : oscillator frequency remark: note that i o(peak) should be less than 12 a; see section 8.3.2 . i o(peak) is the sum of the current through the load and the ripple current. the value of the ripple current is dependent on the coil inductance and the voltage drop across the coil. 14.4 external clock to ensure duty cycle-independent operation, the external clock frequency is divided by two internally. the external clock frequency is therefore twice the internal clock frequency (typically 2 335 khz = 670 khz). if several class d amplifiers are used in a sing le application, it is recommended that all the devices run at the same switching frequen cy. this can be achieved by connecting the osc pins together and feedin g them from an external osc illator. when using an external oscillator, it is nece ssary to force pin osc to a dc leve l above sgnd. this disables the internal oscillator and causes the pwm to switch at ha lf the external clock frequency. the internal oscillator require s an external resistor r osc , connected between pin osc and pin oscref. r osc must be removed when usi ng an external oscillator. the noise generated by the inte rnal oscillator is supply vo ltage dependent. an external low-noise oscillator is recommended for low-no ise applications running at high supply voltages. 14.5 heatsink requirements an external heatsink must be connected to the tda8953. equation 5 defines the relationship between maxi mum power dissipation before activation of tfb and total thermal resistance from junction to ambient. p o0.5 % () r l r l r dson hs () r dson ls () ++ ------------------------------------------------------------------ - v dd v ss ? () 1t wmin () 0.5f osc ? () 2 2r l ------------------------------------------------------------------------------------------------------------------------------- ---------------------------------------------- = i opeak () v dd v ss ? () 1t wmin () 0.5f osc ? () r l r dson hs () r dson ls () + () 2r sl () ++ ---------------------------------------------------------------------------------------------- =
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 25 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier (5) power dissipation (p) is determined by the efficiency of the tda8953. in the following example, a heatsink calculation is made for an 4 se application with a 30 v supply: the audio signal has a crest factor of 10 (the ratio between peak power and average power (20 db); this means that the average output power is 1 ? 10 of the peak power. thus, the peak rms output power level is the 0.5 % thd level, i.e. 92.5 w per channel. the average power is then 1 ? 10 92.5 w = 9.25 w per channel. the dissipated power at an output power of 9.25 w is approximately 9.5 w. when the maximum expected ambient temperature is 50 c, the total r th(j-a) becomes r th(j-a) = r th(j-c) + r th(c-h) + r th(h-a) r th(j-c) (thermal resistance from junction to case) = 0.9 k/w r th(c-h) (thermal resistance from case to heatsink) = 0.5 k/w to 1 k/w (dependent on mounting) so the thermal resistance between heatsink and ambient temperature is: (1) r th(j-a) = 5 k/w. (2) r th(j-a) = 10 k/w. (3) r th(j-a) = 15 k/w. (4) r th(j-a) = 20 k/w. (5) r th(j-a) = 35 k/w. fig 12. derating curves for power dissipat ion as a function of maximum ambient temperature r th ja ? () t j t amb ? p ---------------------- = p (w) 30 20 10 0 t amb ( c) (1) (2) (3) (4) (5) 0 20 100 40 60 80 mbl469 148 50 ? () 9.5 ------------------------- 10.3 k/w =
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 26 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier r th(h-a) (thermal resistance from heatsink to ambient) = 10.3 ? (0.9 + 1) = 8.4 k/w the derating curves for power dissipation (for several r th(j-a) values) are illustrated in figure 12 . a maximum junction temperature t j = 150 c is taken into account. the maximum allowable power dissipation for a gi ven heatsink size can be derived, or the required heatsink size can be determined, at a required power di ssipation level; see figure 12 . 14.6 pumping effects in a typical stereo single-ended configuratio n, the tda8953 is supplied by a symmetrical supply voltage (e.g. v dd = +41 v and v ss = ? 41 v). when the amplifier is used in an se configuration, a ?pumping effect? can occur. du ring one switching interval, energy is taken from one supply (e.g. v dd ), while a part of that energy is returned to the other supply line (e.g. v ss ) and vice versa. when the voltage supply source cannot sink energy, the voltage across the output capacitors of that voltage supply source increases and the supply voltage is pumped to higher levels. the voltage increase caused by the pumping effect depends on: ? speaker impedance ? supply voltage ? audio signal frequency ? value of supply line decoupling capacitors ? source and sink currents of other channels pumping effects should be minimized to preven t the malfunctioning of the audio amplifier and/or the voltage supply source. amplifier malfunction due to the pumping effect can trigger uvp, ovp or ubp. the most effective way to avoid pumping effects is to connect the tda8953 in a mono full-bridge configuration. in the case of ster eo single-ended applications, it is advised to connect the inputs in anti-phase (see section 8.4 on page 13 ). the power supply can also be adapted; for example, by increasing th e values of the supply line decoupling capacitors. 14.7 application schematic notes on the application schematic: ? connect a solid ground plane around the switching amplifier to avoid emissions ? place 100 nf capacitors as close as possible to the tda8953 power supply pins ? connect the heatsink to the ground plane or to vsspn using a 100 nf capacitor ? use a thermally conductive, electrically non-conductive, sil-pad between the tda8953 heat spreader and the external heatsink ? the heat spreader of the tda8953 is inte rnally connected to vssa ? use differential inputs for the most ef fective system level audio performance with unbalanced signal sources. in case of hum due to floating inputs, connect the shielding or source ground to the amplifier ground.
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 27 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier (1) the value of c prot can be in the range 10 pf to 220 pf (see section 8.3.2 ) fig 13. typical application diagram 010aaa622 c in1 in1p in1 + ? + ? in2 in1m sgnd 2 3 19 22 21 20 18 470 nf 470 nf c in2 c in3 in2p in2m 470 nf 470 nf c in4 220 nf v dd v ss 17 7 v ss vdda vssa prot 13 14 15 v ss vssp2 out2 boot2 16 v dd vddp2 n.c. c vdda 220 nf c vssa 100 nf c vddp2 15 nf c bo2 100 nf c vssp2 100 nf c vp2 v ss v ss v ss v dd v dd v dd + ? + ? 11 vssp1 8 vddp1 23 mode mode control 1 osc 6 4 5 oscref 100 nf c vddp1 100 nf c vssp1 100 nf c vp1 c prot (1) v ss 12 stabi c stab 470 nf r osc 30 k 10 9 out1 boot1 15 nf c bo1 l lc1 r vdda 10 r vssa 10 c vp 22 f c vddp3 470 f c vssp3 470 f sgnd v dd v ss v dd v dd v ss v ss r sn1 10 r sn2 10 c sn2 220 pf c sn1 220 pf c sn4 220 pf c lc1 c lc2 c sn3 220 pf r zo2 22 c zo2 100 nf r zo1 22 c zo1 100 nf load l lc c lc 3 to 6 15 h 680 nf 4 to 8 22 h 470 nf single-ended output filter values tda8953j l lc2 sgnd mode control mute/ operating 10 f 5.6 k +5 v 470 standby/ operating 5.6 k t2 hfe > 80 t1 hfe > 80 470 k +5 v 470 k 10 k 10 k n.c. n.c.
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 28 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 14.8 curves measured in refere nce design (demo board tda8953j) v dd = 41 v, v ss = ? 41 v, f osc = 325 khz (external 650 khz oscillator), 2 4 se configuration. (1) f i = 1 khz. (2) f i = 6 khz. (3) f i = 100 hz. fig 14. thd + n as a function of output power, se configuration with 2 4 load v dd = 39 v, v ss = ? 39, f osc = 325 khz (external 650 khz oscillator), 2 3 se configuration. (1) f i = 1 khz. (2) f i = 6 khz. (3) f i = 100 hz. fig 15. thd + n as a function of output power, se configuration with 2 3 load (3) (2) (1) 010aaa598 po (w) 10 ? 2 10 2 10 3 10 10 ? 1 1 1 10 ? 1 10 thd+n (%) 10 ? 2 (3) (2) (1) 010aaa599 po (w) 10 ? 2 10 2 10 3 10 10 ? 1 1 1 10 ? 1 10 thd+n (%) 10 ? 2
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 29 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier v dd = 41 v, v ss = ? 41, f osc = 325 khz (external 650 khz oscillator), 1 8 btl configuration. (1) f i = 1 khz. (2) f i = 6 khz. (3) f i = 100 hz. fig 16. thd + n as a function of output power, btl configuration with 1 8 load v dd = 41 v, v ss = ? 41, f osc = 325 khz (external 650 khz oscillator), 2 4 se configuration. (1) p o = 1 w. (2) p o = 10 w. (3) p o = 100 w. fig 17. thd + n as a function of frequency, se configuration with 2 4 load (3) (2) (1) 010aaa600 po (w) 10 ? 2 10 2 10 3 10 10 ? 1 1 1 10 ? 1 10 thd+n (%) 10 ? 2 (1) (3) (2) 010aaa655 fi (hz) 10 10 5 10 4 10 2 10 3 10 ? 1 1 thd+n (%) 10 ? 2
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 30 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier v dd = 39 v, v ss = ? 39, f osc = 325 khz (external 650 khz oscillator), 2 3 se configuration. (1) p o = 1 w. (2) p o = 10 w. (3) p o = 100 w. fig 18. thd + n as a function of frequency, se configuration with 2 3 load v dd = 41 v, v ss = ? 41, f osc = 325 khz (external 650 khz oscillator), 1 8 btl configuration. (1) p o = 1 w. (2) p o = 10 w. (3) p o = 100 w. fig 19. thd + n as a function of frequency, btl configuration with 1 8 load (1) (3) (2) 010aaa656 fi (hz) 10 10 5 10 4 10 2 10 3 10 ? 1 1 thd+n (%) 10 ? 2 (1) (2) (3) 010aaa629 fi (hz) 10 10 5 10 4 10 2 10 3 10 ? 1 1 thd+n (%) 10 ? 2
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 31 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier v dd = 41 v, v ss = ? 41, f osc = 325 khz (external 650 khz oscillator), 2 4 se configuration. channel b s/n (db). fig 20. channel separation as a function of frequency, se configuration with 2 4 load v dd = 39 v, v ss = ? 39, f osc = 325 khz (external 650 khz oscillator), 2 3 se configuration. channel b s/n (db). fig 21. channel separation as a function of frequency, se configuration with 2 3 load 010aaa604 fi (hz 10 10 5 10 4 10 2 10 3 ? 60 ? 40 ? 80 ? 20 0 chan sep (db) ? 100 010aaa605 fi (hz) 10 10 5 10 4 10 2 10 3 ? 60 ? 40 ? 80 ? 20 0 chan sep (db) ? 100
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 32 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier f i = 1 khz; f osc = 325 khz (external 650 khz oscillator). (1) 2 3 se configuration; v dd = 39 v; v ss = ? 39 v. (2) 2 4 se configuration; v dd = 41 v; v ss = ? 41 v. (3) 2 6 se configuration; v dd = 41 v; v ss = ? 41 v. fig 22. power dissipation as a function of output power per channel, se configuration f i = 1 khz, f osc = 325 khz (external 650 khz oscillator). (1) 2 6 se configuration; v dd = 41 v; v ss = ? 41 v. (2) 2 4 se configuration; v dd = 41 v; v ss = ? 41 v. (3) 2 3 se configuration; v dd = 39 v; v ss = ? 39 v. fig 23. efficiency as a function of output power per channel, se configuration 010aaa606 p o (w/channel) 10 ? 2 10 3 10 2 10 ? 1 110 20 40 60 p d (w) 0 (1) (2) (3) p o (w/channel) 0 250 200 100 (1) (2) (3) 150 50 010aaa607 40 60 20 80 100 efficiency (%) 0
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 33 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier infinite heat sink used. f i = 1 khz, f osc = 325 khz (external 650 khz oscillator). (1) thd + n = 10 %, 2 3 . (2) thd + n = 10 %, 2 4 (3) thd + n = 0.5 %, 2 (4) thd + n = 0.5 %, 2 4 . fig 24. output power as a function of supply voltage, se configuration infinite heat sink used. f i = 1 khz, f osc = 325 khz (external 650 khz oscillator). (1) thd + n = 10 %, 8 . (2) thd + n = 0.5 %, 8 . fig 25. output power as a function of supply voltage, btl configuration (1) (2) (3) (4) vp (v) 12.5 42.5 32.5 22.5 17.5 37.5 27.5 010aaa608 100 150 50 200 250 po (w) 0 (1) (2) vp (v) 12.5 42.5 32.5 22.5 17.5 37.5 27.5 010aaa609 200 300 100 400 500 po (w) 0
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 34 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier v dd = 30 v, v ss = ? 30 v, f osc = 325 khz (external 650 khz oscillator), v i = 100 mv, c i = 330 pf. (1) 1 8 configuration; l lc = 15 h, c lc = 680 nf, v dd = 41 v, v ss = ? 41 v. (2) 2 4 configuration; l lc = 15 h, c lc = 680 nf, v dd = 41 v, v ss = ? 41 v. (3) 2 3 configuration; l lc = 15 h, c lc = 680 nf, v dd = 39 v; v ss = ? 39 v. fig 26. frequency response ripple on vdd, short on input pins. v dd = 41 v, v ss = ? 41 v, v ripple = 2 v (p-p), 2 4 se configuration. (1) operating mode. (2) mute mode. fig 27. svrr as a function of ripple frequency, ripple on v dd (2) (1) (3) 010aaa610 fi (hz) 10 10 5 10 4 10 2 10 3 20 10 30 40 gain (db) 0 (2) (1) 010aaa611 fi (hz) 10 10 5 10 4 10 2 10 3 ? 60 ? 40 ? 80 ? 20 0 svrr (db) ? 100
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 35 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier ripple on vss, short on input pins. v dd = 41 v, v ss = ? 41 v, v ripple = 2 v (p-p), 2 4 se configuration. (1) mute mode. (2) operating mode. fig 28. svrr as a function of ripple frequency, ripple on v ss v dd = 41 v, v ss = ? 41 v, v i = 100 mv, f osc = 325 khz (external 650 khz oscillator), f i = 1 khz (1) mode voltage down. (2) mode voltage up. fig 29. output voltage as a function of mode voltage (2) (1) 010aaa612 fi (hz) 10 10 5 10 4 10 2 10 3 ? 60 ? 40 ? 80 ? 20 0 svrr (db) ? 100 010aaa657 10 ? 2 10 ? 4 10 ? 3 1 10 ? 1 10 v out (v) 10 ? 5 v mode (v) 0 8 6 4 2
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 36 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier v dd = 39 v, v ss = ? 39 v, f osc = 325 khz (external 650 khz oscillator), v i = 2 v (rms). 2 3 se configuration; channel a suppression (db) fig 30. mute attenuation as a function of frequency v dd = 41 v, v ss = ? 41 v, f osc = 325 khz (external 650 khz oscillator), v i = 2 v (rms). 2 4 se configuration; channel a suppression (db) fig 31. mute attenuation as a function of frequency 010aaa614 fi (hz) 10 10 5 10 4 10 2 10 3 ? 60 ? 40 ? 80 ? 20 0 mute suppression (db) ? 100 010aaa615 fi (hz) 10 10 5 10 4 10 2 10 3 ? 60 ? 40 ? 80 ? 20 0 mute suppression (db) ? 100
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 37 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier v dd = 39 v, v ss = ? 39 v, f osc = 325 khz (external 650 khz oscillator), 2 3 se configuration. heat sink: fisher sk495/50; sil-pad: 1500s t. condition: 30 minutes pre-heated in mute (1) maximum output power; tfb on. (2) maximum output power / 8; tfb on. (3) maximum output power; tfb off. (4) maximum output power / 8; tfb off. fig 32. output power as a function of time, 2 3 v dd = 41 v, v ss = ? 41 v, f osc = 325 khz (external 650 khz oscillator, 2 4 se configuration heat sink: fisher sk495/50; sil-pad: 1500s t. condition: 30 minutes pre-heated in mute (1) maximum output power; tfb on. (2) maximum output power / 8; tfb on. (3) maximum output power; tfb off. (4) maximum output power / 8; tfb off. fig 33. output power as a function of time, 2 4 otp activated t (sec) 0 600 400 200 100 500 300 010aaa630 100 200 300 po (w) 0 (1) (4) (2) (3) (1) (3) (4) (2) t (sec) 0 600 400 200 100 500 300 010aaa631 100 150 50 200 250 po (w) 0
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 38 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 15. package outline fig 34. package outline sot411-1 (dbs23p) unit a 2 references outline version european projection issue date iec jedec jeita mm 4.6 4.3 a 4 1.15 0.85 a 5 1.65 1.35 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. sot411-1 98-02-20 02-04-24 0 5 10 mm scale d l l 1 l 2 e 2 e c a 4 a 5 a 2 m l 3 e 1 q w m b p 1 d z e 2 e e 123 j d bs23p: plastic dil-bent-sil power package; 23 leads (straight lead length 3.2 mm) sot411 -1 v m d x h e h non-concave view b : mounting base side b e 1 b p cd (1) e (1) z (1) de d h ll 3 m 0.75 0.60 0.55 0.35 30.4 29.9 28.0 27.5 12 2.54 12.2 11.8 10.15 9.85 1.27 e 2 5.08 2.4 1.6 e h 6 e 1 14 13 l 1 10.7 9.9 l 2 6.2 5.8 e 2 1.43 0.78 2.1 1.8 1.85 1.65 4.3 3.6 2.8 q j 0.25 w 0.6 v 0.03 x 45
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 39 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier fig 35. package outline sot566-3 (hsop24) unit a 4 (1) references outline version european projection issue date 03-02-18 03-07-23 iec jedec jeita mm + 0.08 ? 0.04 3.5 0.35 dimensions (mm are the original dimensions) notes 1. limits per individual lead. 2. plastic or metal protrusions of 0.25 mm maximum per side are not included. sot566-3 0 5 10 mm scale h sop24: plastic, heatsink small outline package; 24 leads; low stand-off height sot566- 3 a max. detail x a 2 3.5 3.2 d 2 1.1 0.9 h e 14.5 13.9 l p 1.1 0.8 q 1.7 1.5 2.7 2.2 v 0.25 w 0.25 yz 8 0 0.07 x 0.03 d 1 13.0 12.6 e 1 6.2 5.8 e 2 2.9 2.5 b p c 0.32 0.23 e 1 d (2) 16.0 15.8 e (2) 11.1 10.9 0.53 0.40 a 3 a 4 a 2 (a 3 ) l p a q d y x h e e c v m a x a b p w m z d 1 d 2 e 2 e 1 e 24 13 1 12 pin 1 index
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 40 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 16. soldering of smd packages this text provides a very brief insight into a complex technology. a more in-depth account of soldering ics can be found in application note an10365 ?surface mount reflow soldering description? . 16.1 introduction to soldering soldering is one of the most common methods through which packages are attached to printed circuit boards (pcbs), to form electr ical circuits. the soldered joint provides both the mechanical and the electrical connection. th ere is no single sold ering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mount devices (smds) are mixed on one printed wiring board; however, it is not suitable for fine pitch smds. reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 16.2 wave and reflow soldering wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. the wave soldering process is suitable for the following: ? through-hole components ? leaded or leadless smds, which are glued to the surface of the printed circuit board not all smds can be wave soldered. packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. also, leaded smds with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased pr obability of bridging. the reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. leaded packages, packages with solder balls, and leadless packages are all reflow solderable. key characteristics in both wave and reflow soldering are: ? board specifications, in cluding the board finish , solder masks and vias ? package footprints, including solder thieves and orientation ? the moisture sensitivit y level of the packages ? package placement ? inspection and repair ? lead-free soldering versus snpb soldering 16.3 wave soldering key characteristics in wave soldering are: ? process issues, such as application of adhe sive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave ? solder bath specifications, including temperature and impurities
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 41 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 16.4 reflow soldering key characteristics in reflow soldering are: ? lead-free versus snpb solderi ng; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see figure 36 ) than a snpb process, thus reducing the process window ? solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board ? reflow temperature profile; this profile includ es preheat, reflow (in which the board is heated to the peak temperature) and coolin g down. it is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). in addition, the peak temperature must be low enough that the packages and/or boards are not damaged. the peak temperature of the package depends on package thickness and volume and is classified in accordance with ta b l e 13 and 14 moisture sensitivity precautions, as indicat ed on the packing, must be respected at all times. studies have shown that small packages reach higher temperatures during reflow soldering, see figure 36 . table 13. snpb eutectic process (from j-std-020c) package thickness (mm) package reflow temperature ( c) volume (mm 3 ) < 350 350 < 2.5 235 220 2.5 220 220 table 14. lead-free process (from j-std-020c) package thickness (mm) package reflow temperature ( c) volume (mm 3 ) < 350 350 to 2 000 > 2 000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 42 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier for further information on temperature profiles, refer to application note an10365 ?surface mount reflow soldering description? . msl: moisture sensitivity level fig 36. temperature profiles for large and small components 001aac84 4 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = msl limit, damage level peak temperature
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 43 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 17. soldering of throug h-hole mount packages 17.1 introduction to solderi ng through-hole mount packages this text gives a very brief insight into wave, dip and manual soldering. wave soldering is the preferred method for mounting of through-hole mount ic packages on a printed-circuit board. 17.2 soldering by dipping or by solder wave driven by legislation and environmental forc es the worldwide use of lead-free solder pastes is increasing. typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 c or 265 c, depending on solder material applied, snpb or pb-free respectively. the total contact time of successi ve solder waves must not exceed 5 seconds. the device may be mounted up to the seati ng plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (t stg(max) ). if the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. 17.3 manual soldering apply the soldering iron (24 v or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. if the temperature of the soldering iron bit is less than 300 c it may remain in contact for up to 10 seconds. if the bit temperature is between 300 c and 400 c, contact may be up to 5 seconds. 17.4 package related soldering information [1] for sdip packages, the longitudinal axis must be para llel to the transport direction of the printed-circuit board. [2] for pmfp packages hot bar solder ing or manual soldering is suitable. table 15. suitability of through-hole mount ic packages for dipping and wave soldering package soldering method dipping wave cpga, hcpga - suitable dbs, dip, hdip, rdbs, sdip, sil suitable suitable [1] pmfp [2] - not suitable
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 44 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 18. revision history table 16. revision history document id release date data sheet status change notice supersedes tda8953 _1 20091224 product data sheet - -
tda8953_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 ? 24 december 2009 45 of 46 nxp semiconductors tda8953 2 210 w class-d power amplifier 19. legal information 19.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 19.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 19.3 disclaimers general ? information in this document is believed to be accurate and reliable. however, nxp semiconductors d oes not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use ? nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale ? nxp semiconductors products are sold subject to the general terms and condit ions of commercial sale, as published at http://www.nxp.com/profile/terms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writ ing by nxp semiconductors. in case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. export control ? this document as well as the item(s) described herein may be subject to export control regulations. export might require a prior authorization from national authorities. quick reference data ? the quick reference data is an extract of the product data given in the limiting values and characteristics sections of this document, and as such is not comp lete, exhaustive or legally binding. 19.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 20. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objec tive specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
nxp semiconductors tda8953 2 210 w class-d power amplifier ? nxp b.v. 2009. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 24 december 2009 document identifier: tda8953_1 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 21. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 quick reference data . . . . . . . . . . . . . . . . . . . . . 2 5 ordering information . . . . . . . . . . . . . . . . . . . . . 2 6 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 7.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 functional description . . . . . . . . . . . . . . . . . . . 5 8.1 general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 8.2 pulse-width modulation frequency . . . . . . . . . . 8 8.3 protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 8.3.1 thermal protection . . . . . . . . . . . . . . . . . . . . . . 9 8.3.1.1 thermal foldback (tfb) . . . . . . . . . . . . . . . . . 9 8.3.1.2 overtemperature protection (otp) . . . . . . . . . 9 8.3.2 overcurrent protection (ocp) . . . . . . . . . . . . 10 8.3.3 window protection (wp). . . . . . . . . . . . . . . . . 11 8.3.4 supply voltage protection . . . . . . . . . . . . . . . . 12 8.3.5 clock protection (cp) . . . . . . . . . . . . . . . . . . . 12 8.3.6 overview of prot ection functions . . . . . . . . . . 13 8.4 differential audio inputs . . . . . . . . . . . . . . . . . 13 9 internal circuitry. . . . . . . . . . . . . . . . . . . . . . . . 15 10 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 17 11 thermal characteristics . . . . . . . . . . . . . . . . . 17 12 static characteristics. . . . . . . . . . . . . . . . . . . . 18 13 dynamic characteristics . . . . . . . . . . . . . . . . . 20 13.1 switching characteristics . . . . . . . . . . . . . . . . 20 13.2 stereo se configuration characteristics . . . . . 21 13.3 mono btl application characteristics . . . . . . . 22 14 application information. . . . . . . . . . . . . . . . . . 23 14.1 mono btl application . . . . . . . . . . . . . . . . . . . 23 14.2 pin mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 14.3 estimating the output power . . . . . . . . . . . . . . 23 14.3.1 single-ended (se) . . . . . . . . . . . . . . . . . . . . . 23 14.3.2 bridge-tied load (btl) . . . . . . . . . . . . . . . . . 24 14.4 external clock . . . . . . . . . . . . . . . . . . . . . . . . . 24 14.5 heatsink requirements . . . . . . . . . . . . . . . . . . 24 14.6 pumping effects . . . . . . . . . . . . . . . . . . . . . . . 26 14.7 application schematic . . . . . . . . . . . . . . . . . . . 26 14.8 curves measured in reference design (demo board tda8953j) . . . . . . . . . . . . . . . . 28 15 package outline . . . . . . . . . . . . . . . . . . . . . . . . 38 16 soldering of smd packages . . . . . . . . . . . . . . 40 16.1 introduction to soldering . . . . . . . . . . . . . . . . . 40 16.2 wave and reflow soldering. . . . . . . . . . . . . . . 40 16.3 wave soldering . . . . . . . . . . . . . . . . . . . . . . . 40 16.4 reflow soldering . . . . . . . . . . . . . . . . . . . . . . 41 17 soldering of through-hole mount packages. 43 17.1 introduction to soldering through-hole mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 17.2 soldering by dipping or by solder wave . . . . . 43 17.3 manual soldering . . . . . . . . . . . . . . . . . . . . . . 43 17.4 package related soldering information. . . . . . 43 18 revision history . . . . . . . . . . . . . . . . . . . . . . . 44 19 legal information . . . . . . . . . . . . . . . . . . . . . . 45 19.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 45 19.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 19.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 45 19.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 45 20 contact information . . . . . . . . . . . . . . . . . . . . 45 21 contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

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